Self-assembled Nanowires Could Make Chips Smaller and Faster
Electrical and computer engineering professor Xiuling Li, left, and graduate research assistant Seth Fortuna have found a new way to make transistors smaller and faster. The technique uses self-assembled, self-aligned, and defect-free nanowire channels made of gallium arsenide. (Photo by L. Brian Stauffer)
Researchers at the University of Illinois have found a new way to make transistors smaller and faster. The technique uses self-assembled, self-aligned, and defect-free nanowire channels made of gallium arsenide.
In a paper to appear in the IEEE (Institute of Electrical and Electronics Engineers) journal Electron Device Letters, U. of I. electrical and computer engineering professor Xiuling Li and graduate research assistant Seth Fortuna describe the first metal-semiconductor field-effect transistor fabricated with a self-assembled, planar gallium-arsenide nanowire channel.
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