Self-assembled Nanowires Could Make Chips Smaller and Faster
Electrical and computer engineering professor Xiuling Li, left, and graduate research assistant Seth Fortuna have found a new way to make transistors smaller and faster. The technique uses self-assembled, self-aligned, and defect-free nanowire channels made of gallium arsenide. (Photo by L. Brian Stauffer)
Researchers at the University of Illinois have found a new way to make transistors smaller and faster. The technique uses self-assembled, self-aligned, and defect-free nanowire channels made of gallium arsenide.
In a paper to appear in the IEEE (Institute of Electrical and Electronics Engineers) journal Electron Device Letters, U. of I. electrical and computer engineering professor Xiuling Li and graduate research assistant Seth Fortuna describe the first metal-semiconductor field-effect transistor fabricated with a self-assembled, planar gallium-arsenide nanowire channel.
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‘Near-Field’ Cooling Technology Will Enable In More Powerful Laptops
Our modern age has become accustomed to regular improvements in information technology, says Slava Rotkin, but these advances do not come without a cost.
Take the laptop, for example. Its components, especially its billions of semiconductor electronic circuits, are growing ever tinier while the instrument’s power and capacity increase. But heat generated by electric current can cause the circuits to melt and the laptop hardware to fail.
Indeed, says Rotkin, an assistant professor of physics, a laptop in use can generate heat faster than an everyday hotplate and almost as fast as a small nuclear reactor.
Developing better methods to dissipate this heat has been listed as a “grand challenge” for modern electronics by the International Technology Roadmap for Semiconductors (ITRS) , a consortium of semiconductor manufacturers. (more…)
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